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The communicative truthful far: On December 15, the Ministry of Electronics and Information Technology (MEITY) announced the motorboat of DHRUV64, an indigenous microprocessor that it said would fortify the nationalist indigenous processor pipeline. Its purported applications span the breadth of user electronics to concern automation.
What is DHRUV64?
The DHRUV64 spot is simply a afloat indigenous microprocessor developed by the Centre for Development of Advanced Computing (C-DAC) nether MEITY’s Microprocessor Development Programme.
The microprocessor is simply a general-purpose ‘brain’ for electronics — a 64-bit, dual-core processor that runs astatine 1 GHz. These specifications could mean the processor is accelerated capable to tally operating systems portion besides being businesslike capable for embedded deployment.
India is simply a large marketplace for processors yet continues to beryllium connected imported designs and proviso chains. To this extremity the Indian authorities has pitched for a “homegrown processor technology”. Such processors beryllium astatine the basal of everything from telecom networks to concern control. So whoever controls their design, toolchain, and update pathways volition besides power information assumptions and resilience during export controls oregon proviso shocks.
What bash DHRUV64’s specs mean?
DHRUV64 is not a spot meant lone for elemental sensing oregon appliance logic. In wide 64-bit designs are utilized erstwhile users privation modern operating systems and modern software.
The specified show is debased compared to top-tier user standards. Today’s state-of-the-art smartphone and laptop processors thin to harvester galore much CPU cores with higher highest timepiece speeds. They besides see specialised blocks similar graphic processing units (GPUs), which tin efficiently grip machine-learning workloads.
This said, a batch of modern computing successful the modern system doesn’t request topline CPUs. These applications see basal presumption subsystems successful telecommunications, concern controllers, routers, and galore automotive modules. They prize reliability and amended hardware-software integration.
At the aforesaid time, arsenic the exertion work The Register wrote, “Those are fields successful which established chipmakers already connection mature products, and accompanying bundle and hardware improvement ecosystems. Even the astir patriotic Indian electronics shaper would surely find it hard to enactment the DHRUV64 astatine the apical of their measure of materials buying list. India truthful has plentifulness near to bash if DHRUV64 is going to triumph customers.”
What processors is India moving on?
According to MEITY, DHRUV64 is portion of India’s ecosystem of processors, including SHAKTI from IIT-Madras, AJIT from IIT-Bombay, VIKRAM from the ISRO-Semiconductor Lab, and THEJAS64 from C-DAC (2025). The needs these processors code see strategical operations, power systems successful factories, spaceflight systems, and concern automation.
MEITY has besides pitched DHRUV64 arsenic a level connected which startups, academia, and manufacture tin physique and trial products on, “without relying connected overseas processors”, and tin make prototypes for caller strategy architectures astatine little cost. This is commendable due to the fact that each processors everywhere, from the Intel Core bid to the Espressif processors successful DIY electronics, lone win erstwhile they person an ecosystem astir them.
What is DIR-V?
RISC-V (pronounced “risk five”) is simply a acceptable of basal instructions that a processor understands. A processor is similar a navigator who tin lone marque the dishes written down successful a look book. This publication is the acquisition set: it lists commands similar “add 2 numbers”, “move information from memory”, “compare 2 values”, “jump to different measurement successful a program”, etc.
RISC-V is an unfastened acquisition set, which means its halfway rules are publically disposable and anyone tin plan a spot that follows them without paying a licence interest for the acquisition acceptable itself. This is antithetic from acquisition sets that are controlled by a institution and licensed to others. There the spot designers volition request to acquisition licenses, motion contracts, etc. This is wherefore governments and probe groups sometimes similar RISC-V.
RISC-V is besides modular: designers tin commencement with a small, modular core, past adhd other features similar faster arithmetics oregon information features depending connected what the spot is meant for. Put differently, antithetic chips tin talk the aforesaid basal connection portion inactive being fine-tuned for antithetic tasks.
DHRUV64 is tied to the Digital India RISC-V (DIR-V) programme, which aims to physique a portfolio of RISC-V-based microprocessors for industry, military, and user technologies. THEJAS32 was the archetypal India-designed spot DIR-V spot to beryllium fabricated (in Malaysia) and THEJAS64 was the second, manufactured astatine SCL Mohali. DHRUV64 is the 3rd connected this list. However, MEITY hasn’t said wherever DHRUV64 was fabricated, which leaves doubts astir the proviso chain.
What other don’t we cognize astir DHRUV64?
MEITY’s announcement of DHRUV64 is bladed connected the engineering accusation required to justice the chip’s readiness. There are 5 issues successful particular.
First, the assertion astir the chip’s show hasn’t been contextualised successful measurable terms. The header specs, i.e. 1 GHz, 64-bit, dual-core, are not accompanied by benchmarks, details of the representation subsystem (e.g. cache sizes and representation controller features), input/output capabilities, and the show per watt. The MEITY connection besides says the plan includes “modern architectural features” and “enhanced multitasking capability” but doesn’t specify what they entail.
Second, the connection claims the processor’s “modern fabrication leverages technologies utilized for high-performance chips” but doesn’t specify the foundry, packaging, yields oregon reliability targets. Applications successful the telecommunications and automotive sectors successful peculiar necessitate these details due to the fact that they’re utilized to find the chip’s lifecycle availability and nonaccomplishment rates.
Third, MEITY’s assertion that the spot is “fully indigenous” is ambiguous. The enactment highlights RISC-V’s unfastened architecture and “no licence costs”. However “indigenous” tin besides an indigenous acquisition set, indigenous halfway microarchitecture, indigenous system-on-chip integration, indigenous toolchain, indigenous fabrication oregon indigenous ownership of captious IP blocks.
Fourth, the announcement doesn’t code questions applicable to an OEM, e.g. erstwhile developer boards volition ship, which operating systems are supported, what information features and audit mechanisms the spot has, and whether the authorities plans to usage them successful anchor scenarios (i.e. wherever by utilizing them it volition trim the risks associated with adoption).
Fifth, the improvement roadmap is not clear. The connection says C-DAC’s adjacent indigenous spot volition beryllium ‘DHANUSH’ and ‘DHANUSH+’; they look to presently beryllium successful the engineering oregon plan stage. MEITY itself hasn’t said however these chips volition amended connected DHRUV64.
However, the MEITY connection indicated DHANUSH volition beryllium a 1.2-GHz quad-core processor and that DHANUSH+ volition beryllium a 2-GHz quad-core processor. One 2023 C-DAC document besides reported that DHANUSH volition person a process node – a fig denoting the transistors’ size – of 28 nm. The Register reported that that of DHANUSH+ would beryllium 14 oregon 16 nm.
What comes next?
India has been focusing connected schemes to widen endowment and the scope for start-ups. The ‘Chips to Startup’ programme, with an outlay of ₹250 crore implicit 5 years; the Design Linked Incentive scheme; and the INUP-i2i inaugural are intended to amended entree to nanofabrication facilities and training. As of 2025, the India Semiconductor Mission has besides approved 10 projects successful six States with concern commitments of ₹1.6 lakh crore.
Against this backdrop, the government’s program for DHRUV64 seems to beryllium to determination towards system-on-chip families, much notation designs, amended bundle support, and capable manufacturing and investigating capableness for home products. The extremity end is for Indian consumers to take an Indian spot without assuming unacceptable costs oregon risk.
